Commit f25e8ddf authored by Oscar Gargiulo's avatar Oscar Gargiulo
Browse files

solved a rounding problem in frequency setting for signal generators

parent 11e21c77
Pipeline #40097 failed with stages
......@@ -129,7 +129,7 @@ class IQCal_QM(IQCal_base):
par_list = self.calibration.cal_par_list()
self._AWG.set_dc_offset_by_qe(self._mixer_ID, 'I', float(par_list[0]))
self._AWG.set_dc_offset_by_qe(self._mixer_ID, 'Q', float(par_list[1]))
self._AWG.set_mixer_correction(self._mixer_ID, IQ_imbalance(1-par_list[2],par_list[4]))
self._AWG.set_correction(self._mixer_ID,IQ_imbalance(1-par_list[2],par_list[4]))
......
......@@ -95,6 +95,7 @@ class IQCal_base(object):
if ID == 'RS':
self._SpecAna = Instruments.SA('SA1','').instr
self._SpecAna._inst.timeout=5e3
elif ID == 'SH':
from SIGNALHOUND import SignalHound
self._SpecAna = SignalHound(OS=OS)
......@@ -208,7 +209,7 @@ class IQCal_base(object):
self._sgLO.power(power)
self.calibration.LOPWR = power
self._sgLO.frequency(self.np.round(LOfreq,10))
self._sgLO.frequency(self.np.round(LOfreq,8))
self._sgLO.instr.reference('EXT')
self._sgLO.output(1)
......@@ -429,7 +430,7 @@ class IQCal_base(object):
import DataModule as dm
self._SpecAna._inst.timeout= 5e3 + ave*0.2e-3
# Set the variables
peaks_span /= 1e3 #MHz -> GHz
LSB = self.calibration.LSB()
......
......@@ -86,7 +86,7 @@ class APMS(object):
if isinstance(arg, str):
return np.round(1e-9*self.com('SOUR{}:FREQ'.format(self.channel), arg),10)
else:
self.com('SOUR{}:FREQ'.format(self.channel), np.round(arg*1e9,12))
self.com('SOUR{}:FREQ'.format(self.channel), np.ceil(arg*1e10)/10)
def power(self, arg='?'):
"""Set RF output power."""
......
......@@ -86,7 +86,8 @@ class APSIN(object):
if isinstance(arg, str):
return self.com('SOUR:FREQ', arg)/1e9
else:
self.com('SOUR:FREQ', np.round(arg*1e9,12))
print()
self.com('SOUR:FREQ', np.ceil(arg*1e10)/10)
def power(self, arg='?'):
"""Set RF output power."""
......
......@@ -5,11 +5,15 @@ Python Driver for Anapico APSIN Signal Generators
authors: Christian Schneider <c.schneider@uibk.ac.at>
Oscar Gargiulo <oscar.gargiulo@uibk.ac.at>
Date: 19.01.2018
v1.0.3 - OSC:
- solved a rounding problem in frequency setting
v1.0.1 - OSC:
- added the route pulse sync to Trig1 port in pulsed mode
v1.0.2 - OSC:
- migrated to visa library
v1.0.1 - OSC:
- added the route pulse sync to Trig1 port in pulsed mode
"""
import visa
import numpy as np
......@@ -25,7 +29,7 @@ class EXG(object):
"""
def __init__(self, ip, channel):
self.version = '1.0.2'
self.version = '1.0.3'
self.ip = ip
# Initialize device
rm = visa.ResourceManager()
......@@ -93,7 +97,7 @@ class EXG(object):
if isinstance(arg, str):
return np.round(1e-9*self.com('SOUR:FREQ', arg),10)
else:
self.com('SOUR:FREQ', np.round(arg*1e9,10))
self.com('SOUR:FREQ', np.ceil(arg*1e10)/10)
def power(self, arg='?'):
"""Set RF output power."""
......
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